Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations

Daniel Llamocca; Cesar Carranza; Marios Pattichis

doi:10.1109/FPL.2011.71

Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations

Daniel Llamocca
, Cesar Carranza
, Marios Pattichis

Sección de Electricidad y Electrónica

The University of New Mexico

Producción científica: Capítulo del libro/informe/acta de congreso › Contribución a la conferencia › revisión exhaustiva

23 Citas (Scopus)

Resumen

Digital video processing requires significant hardware resources to achieve acceptable performance. Digital video processing based on dynamic partial reconfiguration (DPR) allows the designers to control resources based on energy, performance, and accuracy considerations. In this paper, we present a dynamically reconfigurable implementation of a 2D FIR filter where the number of coefficients and coefficients values can be varied to control energy, performance, and precision requirements. We also present a high-performance GPU implementation to help understand the trade-offs between these two technologies. Results using a standard example of 2D Difference of Gaussians (DOG) filter indicate that the DPR implementation can deliver real-time performance with energy per frame consumption that is an order of magnitude less than the GPU. On the other hand, at significantly higher energy consumption levels, the GPU implementation can deliver very high performance.

Idioma original	Inglés
Título de la publicación alojada	Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
Páginas	363-368
Número de páginas	6
DOI	https://doi.org/10.1109/FPL.2011.71
Estado	Publicada - 2011
Evento	21st International Conference on Field Programmable Logic and Applications, FPL 2011 - Chania, Grecia Duración: 5 set. 2011 → 7 set. 2011

Serie de la publicación

Nombre	Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011

Conferencia

Conferencia	21st International Conference on Field Programmable Logic and Applications, FPL 2011
País/Territorio	Grecia
Ciudad	Chania
Período	5/09/11 → 7/09/11

ODS de las Naciones Unidas

Este resultado contribuye a los siguientes Objetivos de Desarrollo Sostenible

ODS 7: Energía asequible y no contaminante

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10.1109/FPL.2011.71

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Llamocca, D., Carranza, C., & Pattichis, M. (2011). Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations. En Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011 (pp. 363-368). Artículo 6044844 (Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011). https://doi.org/10.1109/FPL.2011.71

Llamocca, Daniel ; Carranza, Cesar ; Pattichis, Marios. / Separable FIR filtering in FPGA and GPU implementations : Energy, performance, and accuracy considerations. Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011. 2011. pp. 363-368 (Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011).

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title = "Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations",

abstract = "Digital video processing requires significant hardware resources to achieve acceptable performance. Digital video processing based on dynamic partial reconfiguration (DPR) allows the designers to control resources based on energy, performance, and accuracy considerations. In this paper, we present a dynamically reconfigurable implementation of a 2D FIR filter where the number of coefficients and coefficients values can be varied to control energy, performance, and precision requirements. We also present a high-performance GPU implementation to help understand the trade-offs between these two technologies. Results using a standard example of 2D Difference of Gaussians (DOG) filter indicate that the DPR implementation can deliver real-time performance with energy per frame consumption that is an order of magnitude less than the GPU. On the other hand, at significantly higher energy consumption levels, the GPU implementation can deliver very high performance.",

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Llamocca, D, Carranza, C & Pattichis, M 2011, Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations. En Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011., 6044844, Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011, pp. 363-368, 21st International Conference on Field Programmable Logic and Applications, FPL 2011, Chania, Grecia, 5/09/11. https://doi.org/10.1109/FPL.2011.71

Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations. / Llamocca, Daniel; Carranza, Cesar; Pattichis, Marios.
Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011. 2011. p. 363-368 6044844 (Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011).

Producción científica: Capítulo del libro/informe/acta de congreso › Contribución a la conferencia › revisión exhaustiva

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AB - Digital video processing requires significant hardware resources to achieve acceptable performance. Digital video processing based on dynamic partial reconfiguration (DPR) allows the designers to control resources based on energy, performance, and accuracy considerations. In this paper, we present a dynamically reconfigurable implementation of a 2D FIR filter where the number of coefficients and coefficients values can be varied to control energy, performance, and precision requirements. We also present a high-performance GPU implementation to help understand the trade-offs between these two technologies. Results using a standard example of 2D Difference of Gaussians (DOG) filter indicate that the DPR implementation can deliver real-time performance with energy per frame consumption that is an order of magnitude less than the GPU. On the other hand, at significantly higher energy consumption levels, the GPU implementation can deliver very high performance.

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Llamocca D, Carranza C, Pattichis M. Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations. En Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011. 2011. p. 363-368. 6044844. (Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011). doi: 10.1109/FPL.2011.71

Separable FIR filtering in FPGA and GPU implementations: Energy, performance, and accuracy considerations

Resumen

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