@inproceedings{9ef30f9818d5493eafc99fddeaa166aa,
title = "Reduced power consumption in the FPGA-based Universal Link for LVDS communications",
abstract = "We present a novel version of the FPGA-based Universal Link for LVDS (low-voltage differential signaling) communications that reduces the power consumption by sending the information only when a new data is input. In the a regular LVDS protocol, 4 wires are required for a full duplex communication. The aim of the Universal Link is to reduce the amount of wires in the network by sending data from N signal through a single connection. These new approach reduces the number of bits transmitted to 84% of the original system, when N = 2, and up to 23% for N > 130. Also, the sampling frequency is considerable reduced.",
keywords = "LVDS, Spacewire, Universal Link",
author = "Luis Sanchez and Giancarlo Patino and Victor Murray and James Lyke",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 7th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2016 ; Conference date: 27-02-2016 Through 01-03-2016",
year = "2016",
month = apr,
day = "11",
doi = "10.1109/LASCAS.2016.7451065",
language = "English",
series = "LASCAS 2016 - 7th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "283--286",
editor = "Andreou, {Andreas G.} and Pedro Julian",
booktitle = "LASCAS 2016 - 7th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference",
}