TY - GEN
T1 - Design and implementation of an adaptive neuro-fuzzy inference system on an FPGA used for nonlinear function generation
AU - Saldaña, Henry José Block
AU - Cárdenas, Carlos Silva
PY - 2010
Y1 - 2010
N2 - This paper presents a digital system architecture for a two-input one-output zero order ANFIS (Adaptive Neuro-Fuzzy Inference System) and its implementation on an FPGA (Field Programmable Gate Array) using VHDL (VHSIC Hardware Description Language). The designed system is used for nonlinear function generation. First, a nonlinear function is chosen and off-line training is carried out using MATLAB ANFIS to obtain the premise and consequence parameters of the fuzzy rules. Then, these parameters are converted to a binary fixed-point representation and are stored in read-only memories of the VHDL code. Finally, simulations are performed to verify the system operation and to evaluate the system response time for given input data.
AB - This paper presents a digital system architecture for a two-input one-output zero order ANFIS (Adaptive Neuro-Fuzzy Inference System) and its implementation on an FPGA (Field Programmable Gate Array) using VHDL (VHSIC Hardware Description Language). The designed system is used for nonlinear function generation. First, a nonlinear function is chosen and off-line training is carried out using MATLAB ANFIS to obtain the premise and consequence parameters of the fuzzy rules. Then, these parameters are converted to a binary fixed-point representation and are stored in read-only memories of the VHDL code. Finally, simulations are performed to verify the system operation and to evaluate the system response time for given input data.
KW - ANFIS
KW - Digital system
KW - FPGA
KW - Neuro-fuzzy system
KW - VHDL
UR - http://www.scopus.com/inward/record.url?scp=79952081746&partnerID=8YFLogxK
U2 - 10.1109/ANDESCON.2010.5633065
DO - 10.1109/ANDESCON.2010.5633065
M3 - Conference contribution
AN - SCOPUS:79952081746
SN - 9781424467419
T3 - 2010 IEEE ANDESCON Conference Proceedings, ANDESCON 2010
BT - 2010 IEEE ANDESCON Conference Proceedings, ANDESCON 2010
T2 - 2010 IEEE ANDESCON Conference, ANDESCON 2010
Y2 - 14 September 2010 through 17 September 2010
ER -