A low-noise fully differential recycling folded cascode neural amplifier

Sammy Cerida, Erick Raygada, Carlos Silva, Manuel Monge

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

4 Citas (Scopus)

Resumen

This paper describes the design of an amplifier to be used as part of a neural recording system. The architecture of this amplifier was based on a fully differential folded cascode (FDFC) amplifier and adapted to a recycling architecture [1] which reuses currents in order to achieve better performance. Furthermore, as we are designing a neural amplifier, a low input-referred noise is required due to the small amplitude of neural signals, as they could be as small as 1 μV. The recycling architecture was optimized for low-noise, and simulated in AMS 0.35 μm CMOS process. An input-referred noise of 1.16 μVrms was achieved while consuming 66.03 μW from a 3.3 V supply, which corresponds to NEF=2.58. The open-loop gain of the amplifier is 111.25 dB and the closed-loop gain is 42.10 dB with a bandwidth of 6.02 kHz.

Idioma originalInglés
Título de la publicación alojada2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings
EditoresAlfredo Arnaud, Fernando Silveira, Lorena Garcia
EditorialInstitute of Electrical and Electronics Engineers Inc.
ISBN (versión digital)9781479983322
DOI
EstadoPublicada - 9 set. 2015
Evento6th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2015 - Montevideo, Uruguay
Duración: 24 feb. 201527 feb. 2015

Serie de la publicación

Nombre2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings

Conferencia

Conferencia6th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2015
País/TerritorioUruguay
CiudadMontevideo
Período24/02/1527/02/15

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