TY - GEN
T1 - Separable FIR filtering in FPGA and GPU implementations
T2 - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
AU - Llamocca, Daniel
AU - Carranza, Cesar
AU - Pattichis, Marios
PY - 2011
Y1 - 2011
N2 - Digital video processing requires significant hardware resources to achieve acceptable performance. Digital video processing based on dynamic partial reconfiguration (DPR) allows the designers to control resources based on energy, performance, and accuracy considerations. In this paper, we present a dynamically reconfigurable implementation of a 2D FIR filter where the number of coefficients and coefficients values can be varied to control energy, performance, and precision requirements. We also present a high-performance GPU implementation to help understand the trade-offs between these two technologies. Results using a standard example of 2D Difference of Gaussians (DOG) filter indicate that the DPR implementation can deliver real-time performance with energy per frame consumption that is an order of magnitude less than the GPU. On the other hand, at significantly higher energy consumption levels, the GPU implementation can deliver very high performance.
AB - Digital video processing requires significant hardware resources to achieve acceptable performance. Digital video processing based on dynamic partial reconfiguration (DPR) allows the designers to control resources based on energy, performance, and accuracy considerations. In this paper, we present a dynamically reconfigurable implementation of a 2D FIR filter where the number of coefficients and coefficients values can be varied to control energy, performance, and precision requirements. We also present a high-performance GPU implementation to help understand the trade-offs between these two technologies. Results using a standard example of 2D Difference of Gaussians (DOG) filter indicate that the DPR implementation can deliver real-time performance with energy per frame consumption that is an order of magnitude less than the GPU. On the other hand, at significantly higher energy consumption levels, the GPU implementation can deliver very high performance.
UR - http://www.scopus.com/inward/record.url?scp=80455127079&partnerID=8YFLogxK
U2 - 10.1109/FPL.2011.71
DO - 10.1109/FPL.2011.71
M3 - Conference contribution
AN - SCOPUS:80455127079
SN - 9780769545295
T3 - Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
SP - 363
EP - 368
BT - Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
Y2 - 5 September 2011 through 7 September 2011
ER -
