Design of a CMOS cross-coupled voltage doubler

Luis Rodriguez, Erick Raygada, Carlos Silva, Julio Saldana

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations


This paper describes a design procedure for a CMOS voltage doubler. Test-bench circuit are used to verify the performance of the design. Several equations that relate performance parameters with design variables are presented. This set of equations considers both transient and steady state behavior. Various known energy losses such as switching and conduction losses were taken into account for transistors sizing. The effects of the characteristics of the pump capacitors are analyzed and evaluated through electrical simulations. A design example based on AMS 0.35μm process is presented.

Original languageEnglish
Title of host publicationProceedings of the 2016 IEEE ANDESCON, ANDESCON 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509025312
StatePublished - 27 Jan 2017
Event2016 IEEE ANDESCON, ANDESCON 2016 - Arequipa, Peru
Duration: 19 Oct 201621 Oct 2016

Publication series

NameProceedings of the 2016 IEEE ANDESCON, ANDESCON 2016


Conference2016 IEEE ANDESCON, ANDESCON 2016


  • charge pump
  • control-gate circuit
  • cross-coupled
  • design procedure
  • losses energy
  • voltage doubler


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