TY - GEN
T1 - A digital hardware architecture for a three-input one-output zero-order ANFIS
AU - Saldana, Henry José Block
AU - Silva-Cárdenas, Carlos
PY - 2012
Y1 - 2012
N2 - A digital system architecture for a three-input one-output zero-order ANFIS (Adaptive Neuro-Fuzzy Inference System) is presented. The proposed architecture takes into account that the training process is done off-line in the MATLAB environment. The system is implemented as a nonlinear-function generator for test purposes. Post-place and route simulation results obtained on a Xilinx Spartan-3 XC3S200 FPGA are presented. Its correct operation is verified by the results obtained for two chosen functions. These results show that the system is capable of achieving a close approximation of any of the functions with a fast response time.
AB - A digital system architecture for a three-input one-output zero-order ANFIS (Adaptive Neuro-Fuzzy Inference System) is presented. The proposed architecture takes into account that the training process is done off-line in the MATLAB environment. The system is implemented as a nonlinear-function generator for test purposes. Post-place and route simulation results obtained on a Xilinx Spartan-3 XC3S200 FPGA are presented. Its correct operation is verified by the results obtained for two chosen functions. These results show that the system is capable of achieving a close approximation of any of the functions with a fast response time.
UR - http://www.scopus.com/inward/record.url?scp=84860427621&partnerID=8YFLogxK
U2 - 10.1109/LASCAS.2012.6180304
DO - 10.1109/LASCAS.2012.6180304
M3 - Conference contribution
AN - SCOPUS:84860427621
SN - 9781467312080
T3 - 2012 IEEE 3rd Latin American Symposium on Circuits and Systems, LASCAS 2012 - Conference Proceedings
BT - 2012 IEEE 3rd Latin American Symposium on Circuits and Systems, LASCAS 2012 - Conference Proceedings
T2 - 2012 IEEE 3rd Latin American Symposium on Circuits and Systems, LASCAS 2012
Y2 - 29 February 2012 through 2 March 2012
ER -