TY - GEN
T1 - A CMOS implementation of the discrete time nonlinear energy operator based on a transconductor-squarer circuit
AU - Saldana-Pumarica, Julio
AU - Silva-Cardenas, Carlos
AU - Del-Moral-Hernandez, Emilio
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/4/11
Y1 - 2016/4/11
N2 - This paper presents a strategy for implementing the discrete time version of the Nonlinear Energy Operator (NEO). The proposed implementation approach is based on the utilization of a circuit that produces an output current proportional to the square of its input voltage, which we call transconductor-squarer circuit. In order to avoid adverse effects of mismatch between circuits that should be identical, we propose the reuse of a single transconductor-squarer circuit for the realization of the NEO formula. The NEO system was evaluated simulating its ability to emphasize the presence of neural spikes in a synthetic noisy extracellular neural signal. The circuit is designed aiming at a standard CMOS fabrication process with 90nm minimum channel length and its circuit simulation shows energy consumption of 60pJ per spike. Simulations also show that the circuit is capable of operating at about 30 Ksample/s, compatible with current state-of-the-art neural recording systems.
AB - This paper presents a strategy for implementing the discrete time version of the Nonlinear Energy Operator (NEO). The proposed implementation approach is based on the utilization of a circuit that produces an output current proportional to the square of its input voltage, which we call transconductor-squarer circuit. In order to avoid adverse effects of mismatch between circuits that should be identical, we propose the reuse of a single transconductor-squarer circuit for the realization of the NEO formula. The NEO system was evaluated simulating its ability to emphasize the presence of neural spikes in a synthetic noisy extracellular neural signal. The circuit is designed aiming at a standard CMOS fabrication process with 90nm minimum channel length and its circuit simulation shows energy consumption of 60pJ per spike. Simulations also show that the circuit is capable of operating at about 30 Ksample/s, compatible with current state-of-the-art neural recording systems.
UR - http://www.scopus.com/inward/record.url?scp=84982845595&partnerID=8YFLogxK
U2 - 10.1109/LASCAS.2016.7451093
DO - 10.1109/LASCAS.2016.7451093
M3 - Conference contribution
AN - SCOPUS:84982845595
T3 - LASCAS 2016 - 7th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference
SP - 395
EP - 398
BT - LASCAS 2016 - 7th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference
A2 - Andreou, Andreas G.
A2 - Julian, Pedro
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 7th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2016
Y2 - 27 February 2016 through 1 March 2016
ER -
